▲ Samsung Electronics Executive Chairman Lee Jae-yong inspects advanced semiconductor packaging R&D status during his visit to Samsung's advanced semiconductor packaging R&D hub in Yokohama, Japan, on Nov. 1.
Samsung Electronics Executive Chairman Lee Jae-yong visited the company's advanced semiconductor packaging R&D hub in Yokohama, Japan, today (Nov. 1) to inspect current technology development status.
As packaging technology connecting multiple chips has become as crucial as individual chip performance in boosting artificial intelligence (AI) semiconductor capabilities, this move aims to elevate technological competitiveness through cooperation with Japanese materials, components, and equipment (MCE) companies.
Samsung Electronics announced that Chairman Lee visited APL (Advanced Package Lab), the company's packaging R&D base in Japan, earlier today.
This marks two months since the official opening of APL last September.
Packaging is a technology that protects semiconductor chips from external shocks and connects them with other components.
In advanced AI semiconductors, it also plays a role in enhancing performance by bundling together graphics processing units (GPUs), which perform vast calculations, and high-bandwidth memory (HBM), which supplies data.
Because packaging technology determines how fast data is exchanged between chips and how much power consumption and heat are reduced, it has emerged as a core factor governing AI semiconductor competitiveness.
Chairman Lee's visit focused on securing advanced packaging technology and exploring stronger cooperation with Japanese materials and equipment companies to support it.
Japan is home to many companies with world-class technological prowess in the semiconductor materials and equipment sectors.
Samsung plans to accelerate the development of next-generation packaging technology by combining its semiconductor design and manufacturing capabilities with Japanese companies' material and equipment technologies.
APL serves as an R&D cooperation hub connecting these efforts.
It develops and verifies materials and process technologies required for advanced packaging, while researching next-generation processes and materials such as precision bonding technologies and glass substrates.
The research scope is also expanding to include chip arrangement and connection structures for implementing low-power, high-performance AI semiconductors.
Samsung established APL in Yokohama in 2023 and has been building its research infrastructure with a 40 billion yen investment over five years starting in 2024.
Yokohama has the advantage of being close to Tokyo and having many universities and research institutes, making it advantageous for securing professional talent.
Samsung explained that it is well-suited for joint research and technological cooperation as advanced packaging-related material and equipment companies are clustered there.
Samsung plans to expand local research personnel and strengthen cooperation with Japanese industry, academia, and research institutes to foster APL as a global R&D hub for next-generation packaging technology.
Chairman Lee has been focusing on inspecting technological competitiveness to maintain the semiconductor super-gap by visiting domestic and overseas semiconductor business sites.
Last June, he visited the Cheonan plant in South Chungcheong Province, which handles back-end processes and advanced packaging for Samsung Electronics' HBM.
(Photo provided by Samsung Electronics, Yonhap News)
※
Copying, redistribution, and unauthorized use in AI training are strictly prohibited.